Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5884060 | Processor which performs dynamic instruction scheduling at time of execution within a single clock cycle | Jayachandra B. Avula, Peter H. Jewett, Yatin Mundkur, Vinay Naik, James E. Monaco | 1999-03-16 |
| 5640588 | CPU architecture performing dynamic instruction scheduling at time of execution within single clock cycle | Jayachandra B. Avula, Peter H. Jewett, Yatin Mundkur, Vinay Naik, James E. Monaco | 1997-06-17 |
| 5488729 | Central processing unit architecture with symmetric instruction scheduling to achieve multiple instruction launch and execution | Jayachandra B. Avula, Peter H. Jewett, Yatin Mundkur | 1996-01-30 |
| 5226142 | High performance register file with overlapping windows | Steve Studulski, Peter H. Jewett, Sang-sun Yoo | 1993-07-06 |