GY

Gouichi Yokomizo

RT Renesas Technology: 3 patents #990 of 3,337Top 30%
📍 Hinode, JP: #11 of 31 inventorsTop 40%
Overall (All Time): #1,595,696 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
7123049 Output buffer circuit with control circuit for modifying supply voltage and transistor size Takashi Satou, Shigezumi Matsui, Peter Lee 2006-10-17
6952112 Output buffer circuit with control circuit for modifying supply voltage and transistor size Takashi Satou, Shigezumi Matsui, Peter Lee 2005-10-04
6937059 Output buffer circuit with control circuit for modifying supply voltage and transistor size Takashi Satou, Shigezumi Matsui, Peter Lee 2005-08-30