Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11711246 | Receiver/transmitter co-calibration of voltage levels in pulse amplitude modulation links | — | 2023-07-25 |
| 11323297 | Receiver/transmitter co-calibration of voltage levels in pulse amplitude modulation links | — | 2022-05-03 |
| 11316726 | Calibration for mismatch in receiver circuitry with multiple samplers | Dinesh Patil, Jihong Ren | 2022-04-26 |
| 10892920 | Receiver/transmitter co-calibration of voltage levels in pulse amplitude modulation links | — | 2021-01-12 |
| 10541649 | Digital calibration for multiphase oscillators | Mohammad Hekmat | 2020-01-21 |
| 10447427 | Baseline wander correction | — | 2019-10-15 |
| 10389303 | Integrated circuit comprising fractional clock multiplication circuitry | Masum Hossain, Farshid Aryanfar, Mohammad Hekmat | 2019-08-20 |
| 10243571 | Source-synchronous receiver using edge-detection clock recovery | — | 2019-03-26 |
| 10135566 | Baseline wander correction | — | 2018-11-20 |
| 9998306 | Equalized multi-signaling mode driver | — | 2018-06-12 |
| 9954489 | Integrated circuit comprising fractional clock multiplication circuitry | Masum Hossain, Farshid Aryanfar, Mohammad Hekmat | 2018-04-24 |
| 9780795 | Source-synchronous receiver using edge-detection clock recovery | — | 2017-10-03 |
| 9722539 | Digital calibration for multiphase oscillators | Mohammad Hekmat | 2017-08-01 |
| 9716468 | Integrated circuit comprising fractional clock multiplication circuitry | Masum Hossain, Farshid Aryanfar, Mohammad Hekmat | 2017-07-25 |
| 9660847 | Equalized multi-signaling mode driver | — | 2017-05-23 |
| 9236834 | Integrated circuit comprising fractional clock multiplication circuitry | Masum Hossain, Farshid Aryanfar, Mohammad Hekmat | 2016-01-12 |
| 9231731 | Common mode calibration | Huy M. Nguyen, Kambiz Kaviani, Jason C. Wei, Xudong Shi, Scott C. Best | 2016-01-05 |
| 9166603 | Digital calibration for multiphase oscillators | Mohammad Hekmat | 2015-10-20 |
| 8964879 | Crosstalk reduction coding schemes | Amir Amirkhany, Dinesh Patil, Brian S. Leibowitz | 2015-02-24 |
| 8933729 | Stacked receivers | Xudong Shi, Jason C. Wei, Huy M. Nguyen, Kambiz Kaviani | 2015-01-13 |
| 8901975 | Digital PLL with dynamic loop gain control | — | 2014-12-02 |
| 8854091 | Integrated circuit comprising fractional clock multiplication circuitry | Masum Hossain, Farshid Aryanfar, Mohammad Hekmat | 2014-10-07 |
| 8643414 | Fast locking phase-locked loop | — | 2014-02-04 |
| 8339895 | Signal calibration methods and apparatuses | Frederick A. Ware, John W. Poulton | 2012-12-25 |