Issued Patents All Time
Showing 26–50 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10848350 | Split-path equalizer and related methods, devices and systems | Jared L. Zerbe | 2020-11-24 |
| 10734971 | Noise reducing receiver | Carl W. Werner | 2020-08-04 |
| 10707885 | Variable resolution digital equalization | Kenneth C. Dyer, Nhat Nguyen, Shankar Tangirala | 2020-07-07 |
| 10637696 | Symbol-rate phase detector for multi-PAM receiver | Nhat Nguyen, Charles W. Boecker | 2020-04-28 |
| 10615810 | Integrated circuit comprising circuitry to determine settings for an injection-locked oscillator | Jared L. Zerbe | 2020-04-07 |
| 10608652 | Frequency-agile clock multiplier | Jared L. Zerbe, Brian S. Leibowitz | 2020-03-31 |
| 10587276 | Wide range frequency synthesizer with quadrature generation and spur cancellation | Farshid Aryanfar | 2020-03-10 |
| 10516427 | PAM-4 DFE architectures with symbol-transition dependent DFE tap values | Nhat Nguyen, Yikui Jen Dong, Arash Zargaran-Yazd, Wendemagegnehu Beyene | 2019-12-24 |
| 10389303 | Integrated circuit comprising fractional clock multiplication circuitry | Farshid Aryanfar, Mohammad Hekmat, Reza Navid | 2019-08-20 |
| 10348480 | Collaborative clock and data recovery | Nhat Nguyen, Yikui Jen Dong, Arash Zargaran-Yazd | 2019-07-09 |
| 10298244 | Wide range frequency synthesizer with quadrature generation and spur cancellation | Farshid Aryanfar | 2019-05-21 |
| 10263761 | Clock and data recovery having shared clock generator | Brian S. Leibowitz, Jihong Ren | 2019-04-16 |
| 10230384 | Variable resolution digital equalization | Kenneth C. Dyer, Nhat Nguyen, Shankar Tangirala | 2019-03-12 |
| 10205458 | Run-time output clock determination | Jared L. Zerbe, Brian S. Leibowitz | 2019-02-12 |
| 10091036 | Direct digital sequence detector and equalizer based on analog-to-sequence conversion | Maruf H. Mohammad | 2018-10-02 |
| 10050771 | Clock and data recovery having shared clock generator | Brian S. Leibowitz, Jihong Ren | 2018-08-14 |
| 9954489 | Integrated circuit comprising fractional clock multiplication circuitry | Farshid Aryanfar, Mohammad Hekmat, Reza Navid | 2018-04-24 |
| 9832009 | Collaborative clock and data recovery | Nhat Nguyen, Yikui Jen Dong, Arash Zargaran-Yazd | 2017-11-28 |
| 9768947 | Clock and data recovery having shared clock generator | Brian S. Leibowitz, Jihong Ren | 2017-09-19 |
| 9755866 | Direct digital sequence detector and equalizer based on analog-to-sequence conversion | Maruf H. Mohammad | 2017-09-05 |
| 9735791 | Jitter-based clock selection | Jared L. Zerbe, Brian S. Leibowitz | 2017-08-15 |
| 9735792 | Integrated circuit comprising circuitry to determine settings for an injection-locked oscillator | Jared L. Zerbe | 2017-08-15 |
| 9716468 | Integrated circuit comprising fractional clock multiplication circuitry | Farshid Aryanfar, Mohammad Hekmat, Reza Navid | 2017-07-25 |
| 9692431 | Wide range frequency synthesizer with quadrature generation and spur cancellation | Farshid Aryanfar | 2017-06-27 |
| 9614538 | Analog-to-digital conversion based on signal prediction | Maruf H. Mohammad | 2017-04-04 |