Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12299301 | Methods and systems for altering the path of data movement for large-sized memory transactions | Hithesh Hassan LEPAKSHA, Darshan Kumar Nandanwar | 2025-05-13 |
| 12282447 | Execution unit sharing between processing cores in a cluster of a system-on-chip (SoC) | Hithesh Hassan LEPAKSHA, Darshan Kumar Nandanwar | 2025-04-22 |
| 11940914 | Performance aware partial cache collapse | Hithesh Hassan LEPAKSHA, Darshan Kumar Nandanwar, Nirav Narendra Desai, Venkata Biswanath Devarasetty | 2024-03-26 |
| 11836086 | Access optimized partial cache collapse | Hithesh Hassan LEPAKSHA, Darshan Kumar Nandanwar, Nirav Narendra Desai, Venkata Biswanath Devarasetty | 2023-12-05 |
| 11221667 | Dynamic voltage selection for a single power rail in a multi-core domain | Venkatesh RAVIPATI, Venkata Biswanath Devarasetty, Nirav Narendra Desai, Lakshmi Narayana PANUKU, Kumar Kanti Ghosh +2 more | 2022-01-11 |