Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10109619 | Methods and apparatus for using split N-well cells in a merged N-well block | Harshat Pant, Mohammed Yousuff Shariff, Ramaprasath Vilangudipitchai, Divjyot Bhan | 2018-10-23 |
| 9483600 | Multi supply cell arrays for low power designs | Mamta Bansal, Uday Doddannagari, Paras Gupta, Ramaprasath Vilangudipitchai, Dorav Kumar +1 more | 2016-11-01 |
| 9473113 | Power management with flip-flops | Harshat Pant, Ramaprasath Vilangudipitchai, Divjyot Bhan, Lipeng Cao, Sai Pradeep Kochuri | 2016-10-18 |
| 9190358 | Methods and apparatus for congestion-aware buffering using voltage isolation pathways for integrated circuit designs with multi-power domains | Sundararajan Ranganathan, Paras Gupta, Raghavendra Dasegowda, Rajesh Verma | 2015-11-17 |
| 8853815 | Methods and apparatus for congestion-aware buffering using voltage isolation pathways for integrated circuit designs with multi-power domains | Sundararajan Ranganathan, Paras Gupta, Raghavendra Dasegowda, Rajesh Verma | 2014-10-07 |
| 7948292 | Method and apparatus for buffering signals in voltage domains | Robert Chiu, Denitza Tchoevska, Mark Sternberg | 2011-05-24 |