Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11270761 | Dual-mode high-bandwidth SRAM with self-timed clock circuit | Francois Ibrahim Atallah, Keith Alan Bowman, Daniel Yingling, Jihoon Jeong, Yu Pu | 2022-03-08 |
| 11031075 | High bandwidth register file circuit with high port counts for reduced bitline delay | Francois Ibrahim Atallah, Keith Alan Bowman, Jihoon Jeong | 2021-06-08 |
| 10978139 | Dual-mode high-bandwidth SRAM with self-timed clock circuit | Francois Ibrahim Atallah, Keith Alan Bowman, Daniel Yingling, Jihoon Jeong, Yu Pu | 2021-04-13 |
| 10658029 | High bandwidth double-pumped memory | Francois Ibrahim Atallah, Keith Alan Bowman, Hari M. Rao | 2020-05-19 |
| 10622043 | Multi-pump memory system access circuits for sequentially executing parallel memory operations | Jihoon Jeong, Francois Ibrahim Atallah, Keith Alan Bowman | 2020-04-14 |
| 10424392 | Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods | Francois Ibrahim Atallah, Keith Alan Bowman, David Joseph Winston Hansquine, Jihoon Jeong | 2019-09-24 |
| 10224084 | Wordline negative boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods | Jihoon Jeong, Francois Ibrahim Atallah, Keith Alan Bowman, David Joseph Winston Hansquine | 2019-03-05 |
| 10163490 | P-type field-effect transistor (PFET)-based sense amplifiers for reading PFET pass-gate memory bit cells, and related memory systems and methods | Francois Ibrahim Atallah, Keith Alan Bowman, David Joseph Winston Hansquine, Jihoon Jeong | 2018-12-25 |
| 10115481 | Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods | Francois Ibrahim Atallah, Keith Alan Bowman, David Joseph Winston Hansquine, Jihoon Jeong | 2018-10-30 |
| 10026456 | Bitline positive boost write-assist circuits for memory bit cells employing a P-type Field-Effect transistor (PFET) write port(s), and related systems and methods | Jihoon Jeong, Francois Ibrahim Atallah, Keith Alan Bowman, David Joseph Winston Hansquine | 2018-07-17 |
| 9984730 | Negative supply rail positive boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods | Jihoon Jeong, Francois Ibrahim Atallah, Keith Alan Bowman, David Joseph Winston Hansquine | 2018-05-29 |
| 9947406 | Dynamic tag compare circuits employing P-type field-effect transistor (PFET)-dominant evaluation circuits for reduced evaluation time, and related systems and methods | Keith Alan Bowman, Francois Ibrahim Atallah, David Joseph Winston Hansquine, Jihoon Jeong | 2018-04-17 |
| 9940992 | Leakage-aware activation control of a delayed keeper circuit for a dynamic read operation in a memory bit cell | Francois Ibrahim Atallah, Keith Alan Bowman | 2018-04-10 |
| 9842634 | Wordline negative boost write-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) write port(s), and related systems and methods | Jihoon Jeong, Francois Ibrahim Atallah, Keith Alan Bowman, David Joseph Winston Hansquine | 2017-12-12 |
| 9741452 | Read-assist circuits for memory bit cells employing a P-type field-effect transistor (PFET) read port(s), and related memory systems and methods | Francois Ibrahim Atallah, Keith Alan Bowman, David Joseph Winston Hansquine, Jihoon Jeong | 2017-08-22 |
| 9625924 | Leakage current supply circuit for reducing low drop-out voltage regulator headroom | Francois Ibrahim Atallah, Keith Alan Bowman, Yeshwant Nagaraj Kolla, Burt Lee Price, Samantak Gangopadhyay | 2017-04-18 |
| 8873269 | Read only memory bitline load-balancing | Rahul K. Nadkarni, Daniel R. Baratta, Konark Patel | 2014-10-28 |