Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12393336 | Data storage method, host system and data storage system | Wei-Hsun Lin, Jian Ping Syu, An-Cin Li | 2025-08-19 |
| 12386529 | Read voltage calibration method, memory storage device and memory control circuit unit | Yu-Hung Lin, I-Sung Huang, Po-Cheng Su | 2025-08-12 |
| 12353768 | Memory operation method including performing target calculation in memory storage device, memory storage device and memory control circuit unit | Jian Ping Syu, Wei-Hung Lin, An-Cin Li | 2025-07-08 |
| 12112808 | Read voltage calibration method, memory storage device, and memory control circuit unit | An-Cin Li, Yu-Hung Lin, Kai-Wei Tsou | 2024-10-08 |
| 11726709 | Memory control method, memory storage device and memory control circuit unit | Shih-Jia Zeng, Yu-Siang Yang, Wei-Hung Lin | 2023-08-15 |
| 10984870 | Adjusting read voltage level in rewritable nonvolatile memory module | Wei-Hung Lin, An-Cheng Liu, Yu-Siang Yang | 2021-04-20 |
| 10978163 | Voltage identifying method, memory controlling circuit unit and memory storage device | Wei-Hung Lin, An-Cheng Liu, Yu-Siang Yang | 2021-04-13 |
| 10892026 | Memory management method, memory storage device and memory control circuit unit | Wei-Hung Lin, An-Cheng Liu, Yu-Siang Yang | 2021-01-12 |
| 10872667 | Decoding method, memory controlling circuit unit and memory storage device | Wei-Hung Lin, Yu-Cheng Hsu | 2020-12-22 |
| 10776053 | Memory control method, memory storage device and memory control circuit unit | Wei-Hung Lin, Yu-Cheng Hsu, Yu-Siang Yang | 2020-09-15 |
| 10679707 | Voltage adjusting method, memory controlling circuit unit and memory storage device | Wei-Hung Lin, Yu-Cheng Hsu, Tsai-Hao Kuo, Lih Yuarn Ou, Hsiao-Yi Lin | 2020-06-09 |
| 10622077 | Decoding method, memory storage device and memory control circuit unit | Wei-Hung Lin, Yu-Cheng Hsu, Tien-Ching Wang | 2020-04-14 |
| 10586596 | Data writing method, memory control circuit unit and memory storage apparatus | Wei-Hung Lin, Yu-Cheng Hsu | 2020-03-10 |
| 10445002 | Data accessing method, memory controlling circuit unit and memory storage device | Wei-Hung Lin, An-Cheng Liu, Lih Yuarn Ou | 2019-10-15 |
| 10424391 | Decoding method, memory controlling circuit unit and memory storage device | Wei-Hung Lin, Yu-Cheng Hsu, Yu-Siang Yang | 2019-09-24 |
| 10310941 | Data encoding method, memory control circuit unit and memory storage device | Wei-Hung Lin, Chih-Kang Yeh, Yu-Cheng Hsu | 2019-06-04 |
| 9972390 | Two pass memory programming method, memory control circuit unit and memory storage apparatus | Wei-Hung Lin, Yu-Cheng Hsu | 2018-05-15 |
| 9812194 | Decoding method, memory storage device and memory control circuit unit | Wei-Hung Lin, Yu-Cheng Hsu | 2017-11-07 |