Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Multiple-step epitaxial growth S/D regions for NMOS FinFET

Multiple-step epitaxial growth S/D regions for NMOS FinFET

US Patent 9966433 · Granted May 8, 2018

Estimated economic value: $5,480,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Electronically programmable fuse with heating transistors2025
Metal oxide semiconductor devices and methods of making thereof2025
Semiconductor-on-insulator field-effect transistors including stress-inducing co2025
Optical phase shifter with one or more integrated thermoelectric devices2025
Structure and method of forming spacers on unfaceted raised source/drain regions2025
Method for preparing static/dynamic 3D microcrack propagation sensor, sensor and2025
E-fuse with metal fill2025
Enlarged multilayer nitride waveguide for photonic integrated circuit2025
Bipolar junction transistors with a base layer participating in a diode2025
Bipolar transistor and gate structure on semiconductor fin and methods to form s2024
Bipolar transistors2024
Optical waveguide with stacked cladding material layers2024