Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for manufacturing a Si-based high-mobility CMOS device with stacked channel layers, and resulting devices

Method for manufacturing a Si-based high-mobility CMOS device with stacked channel layers, and resulting devices

US Patent 9947591 · Granted Apr 17, 2018

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Perovskite oxides with a-axis orientation2022
Method for forming a qubit device2021
Si-based high-mobility CMOS device with stacked channel layers and resulting dev2020
Si-based high-mobility CMOS device with stacked channel layers and resulting dev2020
Laser devices2020
Method for formation of a transition metal dichalcogenide (TMDC) material layer2019
Method for manufacturing a Si-based high-mobility CMOS device with stacked chann2019
Method for manufacturing a Si-based high-mobility CMOS device with stacked chann2019
Self-aligned nanostructures for semiconductor devices2018
Gate-all-around semiconductor device and method of fabricating the same2017
Vertical nanowire semiconductor structures2016
Passivated III-V or Ge fin-shaped field effect transistor2016