Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Heuristics for improving performance in a tile based architecture

Heuristics for improving performance in a tile based architecture

US Patent 9792122 · Granted Oct 17, 2017

Estimated economic value: $478,673,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Dynamically reducing latency in processing pipelines2025
Heuristics enabled tiled rendering2025
System and method for a blended reality user interface and gesture control syste2024
Dynamically reducing stutter and latency in video streaming applications2024
Systems and methods for frame time smoothing based on modified animation advance2024
Real-time hardware-assisted GPU tuning using machine learning2024
Real-time hardware-assisted GPU tuning using machine learning2024
Real-time hardware-assisted GPU tuning using machine learning2024
Dynamically reducing latency in processing pipelines2024
System-latency-aware display device2023
Managing virtual machine density by controlling server resource2023
Dynamically reducing stutter and latency in video streaming applications2023