Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › 6T bitcell for single port static random access memories (SRAM) with single-ended read and single-ended write

6T bitcell for single port static random access memories (SRAM) with single-ended read and single-ended write

US Patent 9786358 · Granted Oct 10, 2017

Assignee

No assignee recorded.

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

PPA (power performance area) efficient architecture for rom (read only memory) a2018
PPA (power performance area) efficient architecture for ROM (read only memory) a2018
PPA (power performance area) efficient architecture for ROM (read only memory) a2018
9T, 8T, and 7T bitcells for 1R1W and single port static random access memories (2017
6T bitcell for single port static random access memories (SRAM) with single-ende2017
Static random access memory (SRAM) bitcell and memory architecture without a wri2017
9T, 8T, and 7T bitcells for 1R1W and single port static random access memories (2017
6T bitcell for dual port SRAM memories with single-ended read and single-ended w2016
9T, 8T, and 7T Bitcells for 1R1W and single port static random access memories (2016
Static random access memory (SRAM) bitcell and memory architecture without a wri2016
Memory cells for read only memories2012
Load independent single ended sense amplifier2003