Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10026493 | PPA (power performance area) efficient architecture for rom (read only memory) and a ROM bitcell without a transistor | — | 2018-07-17 |
| 10014065 | PPA (power performance area) efficient architecture for ROM (read only memory) and a ROM bitcell without a transistor | — | 2018-07-03 |
| 10008280 | PPA (power performance area) efficient architecture for ROM (read only memory) and a ROM bitcell without a transistor | — | 2018-06-26 |
| 9786358 | 6T bitcell for single port static random access memories (SRAM) with single-ended read and single-ended write | — | 2017-10-10 |
| 9697888 | 9T, 8T, and 7T bitcells for 1R1W and single port static random access memories (SRAM) with single-ended read and single-ended write | — | 2017-07-04 |
| 9672904 | 6T bitcell for single port static random access memories (SRAM) with single-ended read and single-ended write | — | 2017-06-06 |
| 9653150 | Static random access memory (SRAM) bitcell and memory architecture without a write bitline | — | 2017-05-16 |
| 9627043 | 9T, 8T, and 7T bitcells for 1R1W and single port static random access memories (SRAM) with single-ended read and single-ended write | — | 2017-04-18 |
| 9496029 | 6T bitcell for dual port SRAM memories with single-ended read and single-ended write and optimized bitcells for multiport memories | — | 2016-11-15 |
| 9490008 | 9T, 8T, and 7T Bitcells for 1R1W and single port static random access memories (SRAM) with single-ended read and single-ended write | — | 2016-11-08 |
| 9336861 | Static random access memory (SRAM) bitcell and memory architecture without a write bitline | — | 2016-05-10 |
| 8106463 | Memory cells for read only memories | Zhigeng Liu | 2012-01-31 |
| 6597613 | Load independent single ended sense amplifier | Scott T. Becker, Betina Hold | 2003-07-22 |
| 5963487 | Write enabling circuitry for a semiconductor memory | Shiva P. Gowni, Sanjay Sancheti | 1999-10-05 |