Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Compiler for translating between a virtual image processor instruction set architecture (ISA) and target hardware having a two-dimensional shift array structure

Compiler for translating between a virtual image processor instruction set architecture (ISA) and target hardware having a two-dimensional shift array structure

US Patent 9785423 · Granted Oct 10, 2017

Estimated economic value: $15,318,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Convolutional neural network on programmable two dimensional image processor2024
Methods and apparatus for providing redundant networking capabilities for teleop2023
Way partitioning for a system-level cache2023
Two dimensional masked shift instruction2023
Image quality enhancement for autonomous vehicle remote operations2022
Large lookup tables for an image processor2022
Configurable and programmable image processor unit2022
Block operations for an image processor having a two-dimensional execution lane 2021
Line buffer unit for image processor2021
Compiler for translating between a virtual image processor instruction set archi2021
Two dimensional shift array for image processor2021
Energy efficient processor core architecture for image processor2021