Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Operation modes for an inverted NAND architecture

Operation modes for an inverted NAND architecture

US Patent 9672916 · Granted Jun 6, 2017

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Three-dimensional memory device including laterally separated source lines and m2025
Channel pre-charge process in a memory device2025
Three-dimensional nor array and method of making the same2025
Three-dimensional nor array and method of making the same2025
Three-dimensional memory device with finned support pillar structures and method2025
Compute in memory three-dimensional non-volatile nor memory for neural networks2025
Configurable capacitors with 3D non-volatile array2025
Field effect transistors with gate fins and method of making the same2025
Field effect transistors with gate fins and method of making the same2025
Preparation method for bio-based nucleating agent for poly(ethylene furandicarbo2025
Silicon oxide nitride tunnel dielectric for a storage transistor in a 3-dimensio2025
Bonded semiconductor die assembly containing through-stack via structures and me2025