Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Adaptive technique for adjusting signal development across bit lines for read operation robustness in memory circuits

Adaptive technique for adjusting signal development across bit lines for read operation robustness in memory circuits

US Patent 9530486 · Granted Dec 27, 2016

Estimated economic value: $5,421,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Embedded memory testing using back-to-back write/read operations2017
Programmable circuits for correcting scan-test circuitry defects in integrated c2017
Highly secure and extensive scan testing of integrated circuits2015
Fine-grained power management of synchronous and asynchronous datapath circuits2009
System and method for suppressing crosstalk glitch in digital circuits2008
Method and apparatus for applying fine-grained transforms during placement synth2006
Method of configuring integrated circuits using greedy algorithm for partitionin2003