Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Structure and method to minimize junction capacitance in nano sheets

Structure and method to minimize junction capacitance in nano sheets

US Patent 9515138 · Granted Dec 6, 2016

Estimated economic value: $2,582,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

SRAM macro design architecture2025
Stacked SRAM cell architecture2025
Wearable device for monitoring bodily fluids2025
Bulk nanosheet with dielectric isolation2025
Device structure for inducing layout dependent threshold voltage shift2025
PVD tool to deposit highly reactive materials2025
High aspect ratio contact structure with multiple metal stacks2025
MRAM stack with reduced height2025
Cable management assembly and cable management method2025
Size-efficient mitigation of latchup and latchup propagation2025
Nanosheet device with tri-layer bottom dielectric isolation2025
Semiconductor device design mitigating latch-up2024