Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Methods, apparatus and system for reduction of power consumption in a semiconductor device

Methods, apparatus and system for reduction of power consumption in a semiconductor device

US Patent 9245087 · Granted Jan 26, 2016

Estimated economic value: $652,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Pre-driver circuits for an output driver2021
Electrostatic discharge protection device2020
Pre-driver circuits for an output driver2020
Calibration devices for I/O driver circuits having switches biased differently f2019
Three-dimensional pattern risk scoring2019
Method of forming a gate contact structure and source/drain contact structure fo2019
Multi-stage pattern recognition in circuit designs2019
Feed-forward for silicon inspections (DFM2CFM : design to silicon) and feed-back2018
Method, system and program product for identifying anomalies in integrated circu2018
Methods, apparatus, and system for using filler cells in design of integrated ci2017
Methods, apparatus, and system for using filler cells in design of integrated ci2017
Capacitors including amorphous dielectric layers and methods of forming the same2016