Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Write scheme for charge trapping memory

Write scheme for charge trapping memory

US Patent 9093158 · Granted Jul 28, 2015

Estimated economic value: $11,611,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Enhanced gradient seeding scheme during a program operation in a memory sub-syst2025
Selective increase and decrease to pass voltages for programming a memory device2025
Bias voltage schemes during pre-programming and programming phases2025
Memory device having memory cell strings and separate read and write control gat2025
Detrapping electrons to prevent quick charge loss during program verify operatio2024
Electronic devices comprising reduced charge confinement regions in storage node2024
Enhanced gradient seeding scheme during a program operation in a memory sub-syst2024
Distributed compaction of logical states to reduce program time2023
Short program verify recovery with reduced programming disturbance in a memory s2023
Short program verify recovery with reduced programming disturbance in a memory s2023
Dual verify for quick charge loss reduction in memory cells2023
Apparatus and methods for seeding operations concurrently with data line set ope2023