Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method to reduce program disturbs in non-volatile memory cells

Method to reduce program disturbs in non-volatile memory cells

US Patent 8988938 · Granted Mar 24, 2015

Estimated economic value: $8,236,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Systems and methods involving use of nitrogen-containing plasma to treat lithium2025
Lid for a container2025
Techniques for managing program disturb in non-volatile memory2025
System and method for testing a non-volatile memory2025
Compute-in-memory devices, systems and methods of operation thereof2025
Silicon-oxide-nitride-oxide-silicon based multi-level non-volatile memory device2024
Methods involving use of nitrogen-containing plasma to treat liquid electrolyte 2024
Silicon-oxide-nitride-oxide-silicon multi-level non-volatile memory device and m2023
Embedded SONOS and high voltage select gate with a high-K metal gate and manufac2023
Wave pipeline including synchronous stage2023
Wave pipeline2022
Asymmetric pass field-effect transistor for nonvolatile memory2022