Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Systems and methods for calibrating harmonic rejection in switching mixers

Systems and methods for calibrating harmonic rejection in switching mixers

US Patent 8977211 · Granted Mar 10, 2015

Estimated economic value: $2,145,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Clock path equalization in dual path CDR2024
Dual loop for clock recovery in CDR2024
Baud-rate time error detector2020
Systems and methods for suppressing oscillator-induced spurs in frequency synthe2020
Systems and methods for measuring impulse responses in a digital communication s2019
Transmit architecture for wireless multi-mode applications2016
Calibration circuit and methods for calibrating harmonics in a mixer2016
Calibration circuit and methods for calibrating harmonics in a mixer2016
Calibration circuit and methods for calibrating harmonics in a mixer2016
Dual loop clock and data recovery2015
Methods for sampling time skew compensation in time-interleaved analog to digita2015
Avoiding frequency spikes in modulated systems2015