Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for manufacturing insulated-gate MOS transistors

Method for manufacturing insulated-gate MOS transistors

US Patent 8878331 · Granted Nov 4, 2014

Estimated economic value: $1,945,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

FeFET transistor2023
FeFET transistor2021
Method for local isolation between transistors produced on an SOI substrate, in 2019
Method for local isolation between transistors produced on an SOI substrate, in 2018
Bioconversion of milk with Bifidobacterium breve for treatment of allergic manif2017
Back-illuminated integrated imaging device with simplified interconnect routing2017
Transistor with a low-k sidewall spacer and method of making same2017
Optoelectronic device, in particular memory device2017
Optoelectronic device, in particular memory device2016
Method for manufacturing a polycrystalline dielectric layer2016
Transistor with a low-k sidewall spacer and method of making same2016
Method for forming the gate insulator of a MOS transistor2014