Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Efficient and self-balancing verification of multi-threaded microprocessors

Efficient and self-balancing verification of multi-threaded microprocessors

US Patent 8479173 · Granted Jul 2, 2013

Estimated economic value: $6,261,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Instruction stream retrograding to enhance random test generation2025
Functional test of processor code modification operations2023
Functional test of processor code modification operations2023
Process-based virtualization system for executing a secure application process2022
Clustering simulation failures for triage and debugging2021
Methods and systems for verifying out-of-order page fault detection2021
Intelligent fail recognition2020
Blocking instruction fetching in a computer processor2020
Generating hardware events via the instruction stream for microprocessor verific2015
Verifying correctness of processor transactions2013
Two pass test case generation using self-modifying instruction replacement2013
Software table walk during test verification of a simulated densely threaded net2012