Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › System and method for memory bandwidth friendly sorting on multi-core architectures

System and method for memory bandwidth friendly sorting on multi-core architectures

US Patent 8463820 · Granted Jun 11, 2013

Estimated economic value: $12,060,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Disposable non-slip bath mat with anti-microbial and anti-slip properties2025
Throughput based sizing for hive deployment2025
Gesture-based load control via wearable devices2025
Facilitating portable, reusable, and sharable internet of things (IoT)-based ser2025
Coordinate rotation digital computer using direct memory access engines2025
Using artificial creators to generate media content2025
Privacy-preserving distributed visual data processing2025
Method and system for microarchitecture-aware program sampling2025
Systems and methods to translate a spoken command to a selection sequence2025
Systems and methods to briefly deviate from and resume back to amending a sectio2025
Commissioning load control systems2025
Agents for monitoring live broadcasts for policy enforcement2025