{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Three-path fused multiply-adder circuit", "item": "https://www.patentleaderboard.com/patent/8037118"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Three-path fused multiply-adder circuit

Three-path fused multiply-adder circuit

US Patent 8037118 · Granted Oct 11, 2011

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Register rename stage fusing of instructions2025
Circuitry and method2024
Micro-operation cache using predictive allocation2021
Mispredict recovery apparatus and method for branch and fetch pipelines2020
Non-uniform bus (NUB) interconnect protocol for tiled last level caches2020
Memristor-based dividers using memristors-as-drivers (MAD) gates2020
Bit-masked variable-precision barrel shifter2020
Memristor-based multipliers using memristors-as-drivers (MAD) gates2020
Memristor-based dividers using memristors-as-drivers (MAD) gates2019
Snoop filter with stored replacement information, method for same, and system in2019
Memristor-based multipliers using memristors-as-drivers (MAD) gates2019
Memristor-based dividers using memristors-as-drivers (MAD) gates2019