Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method, apparatus, and system for optimizing frequency and performance in a multi-die microprocessor

Method, apparatus, and system for optimizing frequency and performance in a multi-die microprocessor

US Patent 8032772 · Granted Oct 4, 2011

Estimated economic value: $13,316,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Graphics processing unit processing and caching improvements2025
Coordination and increased utilization of graphics processors during inference2025
Regional adjustment of render rate2025
Sharing register file usage between fused processing resources2025
Utilizing structured sparsity in systolic arrays2025
Systolic array having support for output sparsity2025
Dynamic memory reconfiguration2025
Prefetch status notification for memory prefetching2025
Register file for systolic array2025
Dynamic precision for neural network compute operations2025
Implicit fence for write messages2025
Efficient data sharing for graphics data processing operations2025