{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Methods of verifying functional equivalence between FPGA and structured ASIC logic cells", "item": "https://www.patentleaderboard.com/patent/7992110"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Methods of verifying functional equivalence between FPGA and structured ASIC logic cells

Methods of verifying functional equivalence between FPGA and structured ASIC logic cells

US Patent 7992110 · Granted Aug 2, 2011

Estimated economic value: $9,237,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor package2025
Carrageenan derivative, probe for labelling macrophages, and method for preparin2025
Composition for detecting hydrogen sulfide or measuring hydrogen sulfide concent2025
Microelectronic assemblies having conductive structures with different thickness2025
Dust collecting apparatus for electric precipitator2025
Electric precipitator2025
Die interconnect substrates, a semiconductor device and a method for forming a d2025
Methods to selectively embed magnetic materials in substrate and corresponding s2024
Vehicle seat monopost assembly and rotatable and height adjustable vehicle seat 2024
Supercooling freezer box2024
Secondary battery cell2024
Secondary battery cell2024