Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › System and method for prioritizing arithmetic instructions

System and method for prioritizing arithmetic instructions

US Patent 7984270 · Granted Jul 19, 2011

Estimated economic value: $6,687,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Scheduling instructions in a cascaded delayed execution pipeline to minimize pip2014
Cascaded delayed float/vector execution pipeline2014
Cache line use history based done bit modification to D-cache replacement scheme2013
Cache line use history based done bit modification to I-cache replacement scheme2012
Predicated issue for conditional branch instructions2012
Cache line use history based done bit modification to D-cache replacement scheme2012
Scalar precision float implementation on the “W” lane of vector unit2012
D-cache line use history based done bit based on successful prefetchable counter2012
Store misaligned vector with permute2012
I-cache line use history based done bit based on successful prefetchable counter2012
Multithreaded processor and method for switching threads by swapping instruction2012
Vector morphing mechanism for multiple processor cores2012