Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › System and method for power reduction through power aware latch weighting of complex sub-circuits

System and method for power reduction through power aware latch weighting of complex sub-circuits

US Patent 7930610 · Granted Apr 19, 2011

Estimated economic value: $4,236,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Private memory management using utility thread2025
Preemption techniques for memory-backed registers2025
Multi-stage thread scheduling2025
Cache control to preserve register data2024
Thread channel deactivation based on instruction cache misses2024
Fence enforcement techniques based on stall characteristics2024
Cache footprint management2024
Private memory management using utility thread2023
Instruction-level context switch in SIMD processor2022
Thread-group-scoped gate instruction2021
GPU task scheduling2021
Data alignment and formatting for graphics processing unit2020