Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › System and method for performing masked store operations in a processor

System and method for performing masked store operations in a processor

US Patent 7921263 · Granted Apr 5, 2011

Estimated economic value: $5,422,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Processor execution unit with configurable SIMD functional blocks for complex nu2016
System and method for efficiently performing bit-field extraction and bit-field 2012
DSL trellis encoding2012
System and method for accelerated performance of quadrature amplitude modulation2011
System and method for implementing and utilizing a zero overhead loop2011
Multi-tone transmission2011
Single instruction for data scrambling2011
System and method for bit-reversing and scrambling payload bytes in an asynchron2010
Data de-scrambler2010
System and method for de-scrambling and bit-order-reversing payload bytes in an 2010
System for executing SIMD instruction for real/complex FFT conversion2010
Method, system, and computer program product for executing SIMD instruction for 2010