Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for recovering from system bus transaction errors

Method and apparatus for recovering from system bus transaction errors

US Patent 7836328 · Granted Nov 16, 2010

Estimated economic value: $29,294,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Techniques for combining CMP process tracking data with 3D printed CMP consumabl2024
Integration of a virtualized input/output device in a computer system2020
Separation of control and data plane functions in SoC virtualized I/O device2020
Separation of control and data plane functions in SoC virtualized I/O device2020
Techniques for combining CMP process tracking data with 3D printed CMP consumabl2020
Implementation of reset functions in an SoC virtualized device2019
Correctable error filtering for input/output subsystem2018
Virtualized I/O device sharing within a distributed processing node system2018
Congestion management in distributed systems using autonomous self-regulation2018
Ring controller for PCIe message handling2017
Accelerator system for remote data storage2017
Accelerator system for use with secure data storage2016