Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for designing cell layout of a semiconductor integrated circuit with logic having a data flow

Method for designing cell layout of a semiconductor integrated circuit with logic having a data flow

US Patent 7735040 · Granted Jun 8, 2010

Estimated economic value: $56,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method for designing cell layout of semiconductor integrated circuit2012
Method for designing cell layout of semiconductor integrated circuit2012
Method and system for deciding a wiring route2007
Wiring pattern decision method considering electrical length and multi-layer wir2003
Reticle2003
Massaging appliance2002
Aperture for charged beam drawing machine and method for forming the same2001
Electron beam-writing apparatus and electron beam-writing method2001
Massage device2001
Massager with rotatable head and roller1999
Method of forming a resist pattern1999
Foot vibrator massager having a pair of solinoids1998