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Home › High-speed reduced-output-swing self-biased fully-complementary CMOS comparator with rail-to-rail input common-mode range

High-speed reduced-output-swing self-biased fully-complementary CMOS comparator with rail-to-rail input common-mode range

US Patent 7598777 · Granted Oct 6, 2009

Estimated economic value: $12,351,000 ⓘ

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