Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry

Method of depositing a silicon dioxide comprising layer in the fabrication of integrated circuitry

US Patent 7361614 · Granted Apr 22, 2008

Estimated economic value: $3,044,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Vertical resistor adjacent inactive gate over trench isolation2021
Tapered fin-type field-effect transistors2020
Hybrid fin cut with improved fin profiles2020
Resistor within single diffusion break, and related method2019
Transistor fins with different thickness gate dielectric2019
Methods, apparatus, and system for a semiconductor device comprising gates with 2019
Methods for forming fins2019
Devices and methods of forming SADP on SRAM and SAQP on logic2017
Fin cutting process for manufacturing FinFET semiconductor devices2017
Methods of forming CMOS based integrated circuit products using disposable space2017
MOL contact metallization scheme for improved yield and device reliability2016
Methods of forming reduced thickness spacers in CMOS based integrated circuit pr2016