Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Processor that predicts floating point instruction latency based on predicted precision

Processor that predicts floating point instruction latency based on predicted precision

US Patent 7284117 · Granted Oct 16, 2007

Estimated economic value: $23,867,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method and apparatus for deskewing die to die communication between system on ch2025
Systems, methods, and devices for discarding inactive intermediate render target2024
Systems and methods for disparate data source aggregation, self-adjusting data m2023
Methods and apparatus for implementing cache policies in a graphics processing u2023
Executing a set of load operations for a gather-load instruction and controlling2022
Apparatus and method for operating an issue queue2022
Systems and methods for disparate data source aggregation, self-adjusting data m2022
Spatial memory streaming confidence mechanism2020
System and method for spatial memory streaming training2019
Apparatus and method for supporting a conversion instruction2019
Address re-ordering mechanism for efficient pre-fetch training in an out-of orde2018
Single cycle instruction pipeline scheduling2018