Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and structure for non-single-polycrystalline capacitor in an integrated circuit

Method and structure for non-single-polycrystalline capacitor in an integrated circuit

US Patent 7098103 · Granted Aug 29, 2006

Estimated economic value: $13,386,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

PMOS depletable drain extension made from NMOS dual depletable drain extensions2015
Base for a NPN bipolar transistor2015
Method of manufacturing a MOSFET structure2014
Method of manufacturing a MOSFET structure2014
PMOS depletable drain extension made from NMOS dual depletable drain extensions2013
Bipolar method and structure having improved BVCEO/RCS trade-off made with deple2013
Integrated process for thin film resistors with silicides2012
Integrated process for thin film resistors with silicides2012
Method for producing a transistor gate with sub-photolithographic dimensions2012
Bipolar method and structure having improved BVCEO/RCS trade-off made with deple2011
Depletable cathode low charge storage diode2011
Method for producing a transistor gate with sub-photolithographic dimensions2011