Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for testing or calibrating an analog to digital converter using a phase locked loop

Method and apparatus for testing or calibrating an analog to digital converter using a phase locked loop

US Patent 6885324 · Granted Apr 26, 2005

Estimated economic value: $2,840,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Apparatuses and methods for photonic communication and photonic addressing2021
Apparatuses and methods for photonic communication and photonic addressing2019
Apparatuses and methods for photonic communication and photonic addressing2018
Apparatuses and methods for photonic communication and photonic addressing2017
Programmable capacitor associated with an input/output pad2013
Programmable capacitor associated with an input/output pad2011
DVI link with circuit and method for test2010
Programmable capacitor associated with an input/output pad2009
Semiconductor package assembly and method for electrically isolating modules2008
Semiconductor package assembly and method for electrically isolating modules2008
Optical channels for multi-level metal optical imagers and method for manufactur2008
Semiconductor package assembly and method for electrically isolating modules2007