Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for executing a long latency instruction to delay the restarting of an instruction fetch unit

Method and apparatus for executing a long latency instruction to delay the restarting of an instruction fetch unit

US Patent 6779122 · Granted Aug 17, 2004

Estimated economic value: $19,443,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Sharing register file usage between fused processing resources2025
Utilizing structured sparsity in systolic arrays2025
Systolic array having support for output sparsity2025
Dynamic memory reconfiguration2025
Prefetch status notification for memory prefetching2025
Register file for systolic array2025
Implicit fence for write messages2025
Efficient data sharing for graphics data processing operations2025
Sparse optimizations for a matrix accelerator architecture2025
On chip dense memory for temporal buffering2025
Data initialization techniques2025
Supporting 8-bit floating point format operands in a computing architecture2025