Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Run-time reconfigurable testing of programmable logic devices

Run-time reconfigurable testing of programmable logic devices

US Patent 6668237 · Granted Dec 23, 2003

Estimated economic value: $56,553,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Persistence of write requests in a database proxy2022
System and method for a database proxy2022
Techniques for accelerating compaction2022
System and method to accelerate compaction2021
System and method for a database proxy2021
Systems and methods for congestion control in a network2021
System and method for a database proxy2019
Stream memory management unit (SMMU)2018
Allocating field-programmable gate array (FPGA) resources2018
Allocating field-programmable gate array (FPGA) resources2017
Pipelined multiply-scan circuit2016
Compiler directed cache coherence for many caches generated from high-level lang2016