Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and system for powering down an analog-to-digital converter into a sleep mode

Method and system for powering down an analog-to-digital converter into a sleep mode

US Patent 6642879 · Granted Nov 4, 2003

Estimated economic value: $5,430,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Particle counting apparatus, systems and methods2024
Circuits and methods for implementing mode selection in multiple-mode integrated2009
Circuits and methods for reducing the effects of level shifter delays in systems2008
Method and apparatus for determining a loss of signal condition2007
Scheme for determining internal mode using MCLK frequency autodetect2007
Integrated circuit with mode control for selecting settled and unsettled output 2007
Single clock data communication in direct stream digital system2005
Techniques for signal measurement using a conditionally stable amplifier2005
Integrated circuit with a mode control selecting settled and unsettled output fr2005
Calibration of a loss of signal detection system2004
Application of a conditionally stable instrumentation amplifier to industrial me2003
Use of pointers to enhance flexibility of serial port interface for an integrate2003