Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for low power memory

Method and apparatus for low power memory

US Patent 6608779 · Granted Aug 19, 2003

Estimated economic value: $57,835,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Multi-mode radiation hardened multi-core microprocessors2020
Digital circuits having improved transistors, and methods therefor2019
Secure true random number generation using 1.5-T transistor flash memory2018
Foldable fabric-based packaging solution2018
Digital circuits having improved transistors, and methods therefor2018
Integrated circuit devices and methods2018
Integrated circuit device body bias circuits and methods2017
Digital circuits having improved transistors, and methods therefor2017
Muller C-element as majority gate for self-correcting triple modular redundant l2017
Low complexity out-of-order issue logic using static circuits2017
Integrated circuit devices and methods2017
Techniques for generating physical layouts of in silico multi mode integrated ci2017