Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Circuit configuration for controlling write and read operations in a magnetoresistive memory configuration

Circuit configuration for controlling write and read operations in a magnetoresistive memory configuration

US Patent 6577528 · Granted Jun 10, 2003

Estimated economic value: $158,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Circuit and method for controlling MRAM cell bias voltages2017
Memory controller and method for interleaving DRAM and MRAM accesses2017
Memory device with reduced on-chip noise2017
Boosted supply voltage generator and method therefore2017
Memory device with sampled resistance controlled write voltages2017
Circuit and method for controlling MRAM cell bias voltages2017
Memory controller and method for interleaving DRAM and MRAM accesses2016
Boosted supply voltage generator for a memory device and method therefore2016
Word line supply voltage generator for a memory device and method therefore2016
Circuit and method for controlling MRAM cell bias voltages2015
Memory controller and method for interleaving DRAM and MRAM accesses2015
Memory device with reduced on-chip noise2015