Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method of manufacturing MOS transistor with fluoride implantation on silicon nitride etching stop layer

Method of manufacturing MOS transistor with fluoride implantation on silicon nitride etching stop layer

US Patent 6569726 · Granted May 27, 2003

Estimated economic value: $885,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Erasure coding with overlapped local reconstruction codes2023
Folding treadmill with a positioning structure2009
Method of forming a MOS transistor with improved threshold voltage stability2003
Method of fabricating gate oxide2003
Method of manufacturing MOS transistor with fluorine implantation at a low energ2003
Method of manufacturing MOS transistor with fluorine implantation at a low energ2003
Method of fabricating node contact opening2001
Method of fabricating node contact opening2001
Method of increasing gate surface area for depositing silicide material2001
Method of manufacturing inter-metal dielectric layer2001
Method of fabricating a bit line of flash memory2001
Method of fabricating self-aligned node2001