Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6664172 | Method of forming a MOS transistor with improved threshold voltage stability | Chung-Yi Chen | 2003-12-16 |
| 6635537 | Method of fabricating gate oxide | Shih-Chien Hsu, Chang-Chi Huang, Cheng-Tung Huang, Sheng-Hao Lin | 2003-10-21 |
| 6569726 | Method of manufacturing MOS transistor with fluoride implantation on silicon nitride etching stop layer | Terry Chen | 2003-05-27 |
| 6534354 | Method of manufacturing MOS transistor with fluorine implantation at a low energy | Terry Chen | 2003-03-18 |
| 6300238 | Method of fabricating node contact opening | Terry Chen | 2001-10-09 |
| 6251737 | Method of increasing gate surface area for depositing silicide material | — | 2001-06-26 |
| 6228756 | Method of manufacturing inter-metal dielectric layer | — | 2001-05-08 |
| 6214741 | Method of fabricating a bit line of flash memory | — | 2001-04-10 |
| 6174782 | Method of fabricating lower electrode of capacitor | — | 2001-01-16 |
| 6169017 | Method to increase contact area | — | 2001-01-02 |
| 6150237 | Method of fabricating STI | — | 2000-11-21 |
| 6133091 | Method of fabricating a lower electrode of capacitor | Hsi-Mao Hsiao, Wen-Shan Wei, Chun-Lung Chen | 2000-10-17 |
| 6127228 | Method of forming buried bit line | — | 2000-10-03 |
| 6093600 | Method of fabricating a dynamic random-access memory device | Terry Chen | 2000-07-25 |
| 6090698 | Fabrication method for an insulation structure having a low dielectric constant | — | 2000-07-18 |
| 6069032 | Salicide process | — | 2000-05-30 |
| 6060361 | Method for preventing dopant diffusion in dual gate device | — | 2000-05-09 |
| 6043154 | Method for manufacturing charge storage electrode | — | 2000-03-28 |
| 5932333 | Method for manufacturing charge storage electrode | — | 1999-08-03 |