Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › In-place repeater insertion methodology for over-the-block routed integrated circuits

In-place repeater insertion methodology for over-the-block routed integrated circuits

US Patent 6477690 · Granted Nov 5, 2002

Estimated economic value: $15,798,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

System and method for measuring fault coverage in an integrated circuit2005
System and method for measuring fault coverage in an integrated circuit2004
Clock pulse width control circuit2004
In-place method for inserting repeater buffers in an integrated circuit2003
System and method for interfacing data with a test access port of a processor2002
Method for managing metal resources for over-the-block routing in integrated cir2002
System and method for testing a microprocessor with an onboard test vector gener2002
System and method for testing a microprocessor with an onboard test vector gener2001
Bi-directional linear feedback shift register1998
Encoding and decoding of dual-ported RAM parity using one shared parity tree and1996