Assignee
Inventors
- Stephen S. Pawlowski (67 patents)
- Daniel G. Lau (6 patents)
{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "System and apparatus including lowest priority logic to select a processor to receive an interrupt message", "item": "https://www.patentleaderboard.com/patent/6418496"}]}
Skip to contentUS Patent 6418496 · Granted Jul 9, 2002