Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for altering timing relationships of non-overlapping clock signals in a microprocessor

Method and apparatus for altering timing relationships of non-overlapping clock signals in a microprocessor

US Patent 6381704 · Granted Apr 30, 2002

Estimated economic value: $26,893,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Stress reduction on stacked transistor circuits2025
Adaptive voltage scaling using temperature and performance sensors2025
Stress reduction on stacked transistor circuits2025
Screening of memory circuits2024
Stress reduction on stacked transistor circuits2023
Stress reduction on stacked transistor circuits2023
Screening of memory circuits2023
Circuits and methods for asymmetric aging prevention2014
Compensatory memory system2012
Semiconductor device testing2008
Semiconductor device testing2008
Semiconductor device testing2008