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Home › Test circuits for testing inter-device FPGA links including a shift register configured from FPGA elements to form a shift block through said inter-device FPGA links

Test circuits for testing inter-device FPGA links including a shift register configured from FPGA elements to form a shift block through said inter-device FPGA links

US Patent 6347387 · Granted Feb 12, 2002

Estimated economic value: $10,460,000 ⓘ

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