{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Process of manufacturing Trench gate semiconductor device having gate oxide layer with multiple thicknesses", "item": "https://www.patentleaderboard.com/patent/6291298"}]}

Home › Process of manufacturing Trench gate semiconductor device having gate oxide layer with multiple thicknesses

Process of manufacturing Trench gate semiconductor device having gate oxide layer with multiple thicknesses

US Patent 6291298 · Granted Sep 18, 2001

Assignee

Advanced Analogic Technologies Incorporated

Inventors

Richard K. Williams (316 patents)
Wayne B. Grabowski (32 patents)

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