{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Method for making a floating gate memory with improved interpoly dielectric", "item": "https://www.patentleaderboard.com/patent/6177311"}]}
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Home › Method for making a floating gate memory with improved interpoly dielectric

Method for making a floating gate memory with improved interpoly dielectric

US Patent 6177311 · Granted Jan 23, 2001

Estimated economic value: $25,455,000 ⓘ

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